1. Field of the Invention
The present invention relates to a flash memory device, and more particularly, to a method of reading configuration data, which improves reliability of reading operations of a flash memory device.
2. Description of the Related Art
A flash memory is a nonvolatile memory device which can be electrically erased and reprogrammed. Flash memories have power consumption lower than that of a recording medium based on a magnetic disk memory, and an access time as fast as a hard disk of the magnetic disk memory.
Flash memory devices may be classified as NOR type flash memories or NAND type flash memories, in which cell transistors and bit lines are connected. In a NOR type flash memory device, at least two cell transistors are connected in parallel with a single bit line. The NOR type flash memory device stores data using a channel hot electron method and erases data using a Fowler-Nordheim (F-N) tunneling method. A NAND type flash memory device has at least two cell transistors serially connected to a single bit line. The NAND type flash memory device stores and erases data using the F-N tunneling method.
Generally, a NOR type flash memory consumes a lot of power, and thus cannot be highly integrated. However, a NOR type flash memory has a high operating speed. In contrast, a NAND type flash memory uses less cell current than a NOR type flash memory, and thus is suitable for high integration.
FIG. 1A is a circuit diagram of memory cells included in a conventional NAND type flash memory device. Referring to FIG. 1A, the conventional NAND type flash memory device includes memory cells M11, M12, M13 and M14, multiple wordlines WL11, WL12, WL3 and WL14, select transistors ST1 and ST2, and a bit line BL. The memory cells M11, M12, M13 and M14 form a string structure with the select transistors ST1 and ST2, and are connected in series between a bit line BL and a ground voltage VSS. The conventional NAND type flash memory uses a low cell current, and thus all the memory cells connected to a single wordline are programmed in one program operation.
FIG. 1B is a circuit diagram of a conventional NOR type flash memory. Referring to FIG. 1B, the conventional NOR type flash memory includes memory cells M21 through M26 connected between bit lines BL1 and BL2 and a source line CSL. The conventional NOR type flash memory consumes a lot of power and involves high current consumption while performing a program operation, and thus a the NOR type flash memory programs a predetermined number of memory cells through a one-time programming operation
A flash memory also can be classified into a single-level cell (SLC) flash memory or a multi-level cell (MLC) flash memory based on the number of bits stored in one memory cell. An SLC flash memory is used to store one bit of data in one memory cell, while an MLC flash memory is used to store two bits of data in one memory cell in order to increase the degree of integration.
FIG. 2A is a graph illustrating cell threshold voltages in relation to stored data when the memory cells M11 through M14 of FIG. 1A or the memory cells M21 through M26 of FIG. 1B are SLCs. FIG. 2B is a graph illustrating cell threshold voltages in relation to stored data when the memory cells M11 through M14 of FIG. 1A or the memory cells M21 through M26 of FIG. 1B are MLCs.
Referring to FIG. 2A, the SLC stores one bit of data according to two different threshold voltage ranges programmed in a memory cell. For example, when the threshold voltage programmed in a memory cell is 1 through 3 volts, data stored in the memory cell is logic “1, ” and when a threshold voltage programmed in a memory cell is 5 through 7 volts, data stored in the memory cell is logic “0.”
Referring to FIG. 2B, the MLC stores two bits of data according to four different threshold voltage ranges programmed in a memory cell. For example, when a threshold voltage programmed in a memory cell is 1 through 3 volts, data stored in the memory cell is logic “11,” and when a threshold voltage programmed in a memory cell is 3.8 through 4.2 volts, data stored in the memory cell is logic “10.” Also, when a threshold voltage programmed in a memory cell is 4.9 through 5.4 volts, data stored in the memory cell is logic “01,” and when a threshold voltage programmed in a memory cell is 6.5 through 7.0 volts, data stored in the memory cell is logic “00.”
Regarding a flash memory employing an SLC or an MLC, data stored in a memory cell is classified according to cell current during a read operation. Operations of SLC and MLC flash memories are apparent to one of ordinary skill in the art, and thus detailed descriptions thereof are not included.
Generally, various types of information required in operating a memory should be included in a memory device. For example, an electrical fuse (E-Fuse) method is a method of storing the various types of information in a memory cell instead of a conventional laser fuse, reading the information when a memory chip operates, turning ON/OFF a corresponding switch, and sending the information. Information stored in an E-Fuse form may include DC trim information for operating a memory chip, option information, repair and bad block information, and the like. Such information for operating the memory chip is pre-stored while testing a certain area of a memory cell.
When power is applied to a memory chip, the above information is stored in a latch of the memory chip through a data reading process, and the corresponding switch is turned ON/OFF using the stored information. Various DC level values are set up using the information for operating a memory, and defect columns and defect blocks can be repaired.
However, configuration data stored in E-Fuse form (hereinafter, referred to as E-Fuse data) may not be reliable, because the configuration data cannot use the DC trim information and is read using a DC level setup as a default. A read voltage has a predetermined DC level between each state of FIG. 2, and a memory cell that has a threshold voltage lower than the predetermined DC level is turned ON. Conversely, a memory cell that has a threshold voltage higher than the predetermined DC level is turned OFF. Accordingly, the E-Fuse data may be incorrectly read based on changes of the default DC level due to process variations.
The E-Fuse data may also be incorrectly read due to a read disturb phenomenon that may occur when repeatedly reading the E-Fuse data. In the read disturb phenomenon, data that is to be read is affected by high voltage applied to non-selected word lines while reading the data.
Accordingly, when E-Fuse data related to operating a memory is read, an error may occur due to a change of an operating environment of a memory device. Thus, reading operations of the E-Fuse data may be unreliable and cannot be guaranteed.